Shodhganga : a reservoir of Indian theses @ INFLIBNET
The Shodhganga@INFLIBNET Centre provides a platform for research students to deposit their Ph.D. theses and make it available to the entire scholarly community in open access.
Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/479315
| Title: | Application Mapping and Flow Priority Assignment Techniques for Real Time Network on Chip Design |
| Researcher: | Khare, Ajay |
| Guide(s): | Chattopadhyay, Santanu |
| Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
| University: | Indian Institute of Technology Kharagpur |
| Completed Date: | 2022 |
| Abstract: | newline |
| Pagination: | |
| URI: | http://hdl.handle.net/10603/479315 |
| Appears in Departments: | Electronics and Electrical Communication Engg |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 01_title.pdf | Attached File | 400.03 kB | Adobe PDF | View/Open |
| 04_abstract.pdf | 126.91 kB | Adobe PDF | View/Open | |
| 80_recommendation.pdf | 693.62 kB | Adobe PDF | View/Open |
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