1. Shodhganga@INFLIBNET
  2. Shri Jagdishprasad Jhabarmal Tibarewala University
  3. Faculty of Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/477846
Title: Low power design using reversible coding in stacked binary counters and ternary content addressable memory
Researcher: Santhi Chebiyyam
Guide(s): Moparthy Gurunadha Babu
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Shri Jagdishprasad Jhabarmal Tibarewala University
Completed Date: 2020
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/477846
Appears in Departments:Faculty of Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File155.09 kBAdobe PDFView/Open
02_prelim pages.pdf516.64 kBAdobe PDFView/Open
03_content.pdf336.08 kBAdobe PDFView/Open
04_abstract.pdf170.16 kBAdobe PDFView/Open
05_chapter 01.pdf615.64 kBAdobe PDFView/Open
06_chapter 02.pdf552.88 kBAdobe PDFView/Open
07_chapter 03.pdf1.13 MBAdobe PDFView/Open
08_chapter 04.pdf1.65 MBAdobe PDFView/Open
09_chapter 05.pdf1.05 MBAdobe PDFView/Open
10_chapter 06.pdf1.44 MBAdobe PDFView/Open
11_annexures.pdf339.04 kBAdobe PDFView/Open
80_recommendation.pdf213.15 kBAdobe PDFView/Open
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