Datapath elements design in 15nm finfet technology using self controllable voltage level technique

Abstract

newline The primary focus of the work that is presented in this thesis is the design of Fin-type Field Effect Transistor (FinFET) circuits, which include both the Arithmetic and Logic Units (ALUs). The theory and vocabulary of FinFET technology, as well as technology in general, are examined in depth throughout the thesis. In order to get a more in-depth understanding of the issue at hand, a variety of original concepts and applications found in the research literature have been analysed. Discoveries have shown that there is a potential for developing and manufacturing innovative FinFET-based logic devices and applications with improved circuit characteristics such as area, circuit complexity, and clock delays. These improvements have been made possible by advances in semiconductor technology. This serves as a source of inspiration for me to accomplish the responsibilities that have been entrusted to me as part of this educational programme. In addition, a comprehensive analysis of FinFET circuits is provided, which serves as an overview of the available research in this field. It has been discussed how to develop logic circuits based on FinFET by using a combinational design technique to accomplish so, and this topic has been covered. In the course of this investigation, an attempt was made to design a Self-Controllable Voltage Level (SCVL) using a FinFET that had enhanced circuit features. An alternate combinational circuit is shown here, and it is based on three input XOR gates. This circuit can do both complete addition and full subtraction. The standard circuit characteristics like as design complexity, speed, and power consumption were taken into account while presenting revolutionary FinFET- based circuits in this thesis, just as was the case in earlier studies. Before moving on to this stage of the design process, the low-power full adder will have been developed, and the performance metrics will have been evaluated using FinFET technology in each of the four regimes. It has been shown that it is possible to im