Decision diagrams based on line testing of digital vlsi circuits

Abstract

The rapid increase in complexity of VLSI circuits with the advent of Deep Sub Micron DSM technology causes development of faults during their normal operation Such faults cannot be detected by off line test or Built In Self Test BIST techniques thus On line Testing OLT is becoming an essential part in Design for Testability DFT Most of the existing works presented in the literature on OLT of digital circuits have emphasized on the followings non intrusiveness totally self checkin