Design of 0 18µm cmos dual band low Noise amplifer for irnss applications

Abstract

Wireless communication has been experiencing enormous growth newlineand demand for its low cost Radio Frequency Integrated Circuit (RFIC) newlinedesigns. The design of RFICs for next generation wireless applications is one newlineof the emerging researches and many researchers are working on these front newlineend components for multi standard multiband applications. Various newlinechallenges are faced while designing the receiver building blocks for different newlinefrequency bands. newlineIn recent research, wireless transceivers designed for customized newlineapplications are substituted with single circuit which support multiple newlinestandards operating on different frequency bands. In this regard designers face newlinea lot of challenges and tradeoffs between input and output mis-match, newlinebandwidth, gain and low power dissipation with minimum chip area. Based newlineon technology growth and higher frequencies, the transceiver circuit design newlineremains quite challenging. The performance of the transceivers depends on newlineeach of the individual blocks such as Low Noise Amplifiers (LNA). The newlinemajor and primary purpose of LNA is to amplify the received signal without newlineadding additional noise to the circuit. Practically, LNA are placed very next to newlinethe receiver antenna, which require proper impedance matching in order to newlineavoid reflection. newlineIn this proposed work, the objective is to design a higher newlineperformance dual band LNA for Indian Regional Navigation Satellite System newline(IRNSS) receiver. IRNSS receiver is an indigenously developed satellite newlinenavigation system designed to provide accurate position information service newlineto users in India as well as the regions extending up to 1500 km from its newlineiv newlineboundary. This LNA is designed for L5 band (1176.45 MHz) and S-band newline(2492.08 MHz) frequencies. newline