Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/473649
Title: Temperature Aware Architectures for Improved Read and Write Reliability of STT MRAM Memory Sub System
Researcher: Saravanan, S
Guide(s): Srinivas, M. B and Sahoo, Subhendu Kumar
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Birla Institute of Technology and Science
Completed Date: 2022
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/473649
Appears in Departments:Electrical & Electronics Engineering

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01_title.pdfAttached File213.5 kBAdobe PDFView/Open
02_prelim pages.pdf3.44 MBAdobe PDFView/Open
03_contents.pdf1.21 MBAdobe PDFView/Open
04_abstract.pdf2.75 MBAdobe PDFView/Open
05_chapter1.pdf18.23 MBAdobe PDFView/Open
06_chapter2.pdf7.63 MBAdobe PDFView/Open
07_chapter3.pdf8.5 MBAdobe PDFView/Open
08_chapter4.pdf8.14 MBAdobe PDFView/Open
09_chapter5.pdf15.03 MBAdobe PDFView/Open
10_chapter6.pdf2.71 MBAdobe PDFView/Open
11_annexures.pdf13.73 MBAdobe PDFView/Open
80_recommendation.pdf2.94 MBAdobe PDFView/Open
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