Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/470997
Title: Optimization of VlSI Floorplanning Problem
Researcher: AMARBIR SINGH
Guide(s): Leena Jain
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: I. K. Gujral Punjab Technical University
Completed Date: 2020
Abstract: The number of electronic components in an Integrated Circuit (IC) has been newlineincreasing exponentially over the years. New technological advancements have newlineenabled engineers to build VLSI (Very Large Scale Integration) chip containing newlinemillions of transistors. Designing a VLSI circuit is a complex task as it involves high newlinepacking density and the requirement of high clock frequency makes this task even newlinemore complex. Due to these reasons, physical design automation plays a vital role in newlinedeveloping and fabricating a VLSI chip. newline
Pagination: All pages
URI: http://hdl.handle.net/10603/470997
Appears in Departments:Department of Computer Applications

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01_title.pdfAttached File87.63 kBAdobe PDFView/Open
02_prelim page.pdf446.71 kBAdobe PDFView/Open
03_content.pdf151.91 kBAdobe PDFView/Open
04_abstract.pdf143.37 kBAdobe PDFView/Open
05_chapter1.pdf622.38 kBAdobe PDFView/Open
06_chapter2.pdf340.24 kBAdobe PDFView/Open
07_chapter3.pdf851.87 kBAdobe PDFView/Open
08_chapter4.pdf1.25 MBAdobe PDFView/Open
09_chapter5.pdf531.41 kBAdobe PDFView/Open
10_chapter6.pdf338.51 kBAdobe PDFView/Open
11_annexure.pdf378.88 kBAdobe PDFView/Open
80_recommendation.pdf195.53 kBAdobe PDFView/Open
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