Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/470439
Title: | Low power vlsi architectures for cryptographic algorithms |
Researcher: | Gangadari, Bhoopal Rao |
Guide(s): | Ahamed, Shaik Rafi |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Indian Institute of Technology Guwahati |
Completed Date: | 2018 |
Abstract: | With the advent of technology and portable devices for communications cryptography algorithms are widely used in the modern days Cryptographic algorithms have diverse applications to protect data from unauthorized attacks This thesis proposes novel approaches for low power Very Large Scale Integrated Circuits VLSI architectures for Wireless Body Area Network WBAN cryptographic applications so as to improve the performance in terms of area utilization and energy consumption Motivated by t |
Pagination: | Not Available |
URI: | http://hdl.handle.net/10603/470439 |
Appears in Departments: | DEPARTMENT OF ELECTRONICS AND ELECTRICAL ENGINEERING |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_fulltext.pdf | Attached File | 4.48 MB | Adobe PDF | View/Open |
04_abstract.pdf | 110.96 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 217.12 kB | Adobe PDF | View/Open |
Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).
Altmetric Badge: