Energy and thermal management of cmps by dynamic cache reconfiguration

Abstract

Ever increasing demand of processing speed and parallelism along with the modern shrunk transistors motivates the architects to increase the number of cores on a single chip leading to Chip Multi Processors CMPs To commensurate the data demand of these high number of cores large on chip Last Level Caches LLCs are integrated After studying a plethora of prior works it has been concluded that LLCs play a vital role in maintaining system performance by accumulating more data on chip But