Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/459892
Title: Ripple Minimization of Input and Inductor Currents in Coupled Inductor Single Input Dual Output DC-DC Converters
Researcher: Nupur
Guide(s): Nath, Shabari
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Indian Institute of Technology Guwahati
Completed Date: 2023
Abstract: The single input multiple outputs (SIMO) DC-DC converters with two outputs are called single input dual output (SIDO) DC-DC converters. The SIDO converters can generate two different DC voltage levels from only one available DC voltage level with the reduced component count, reduced losses, reduced physical size and increased efficiency. The introduction of an inversely coupled inductor further reduces the physical size as the flux due to the two windings cancels each other, resulting in a reduced flux in the core. Therefore, the coupled inductor single input dual output (CI-SIDO) buck, boost, and buck-boost converters are analyzed in this thesis. The analysis of each CI-SIDO converter for all possible values of the coupled inductor parameters, duty ratios, and the gate pulse shift is very tedious and repetitive. An approach to unify inductor current waveforms and inductor current ripples in CI-SIDO converters is presented by forming sectors of duty ratios. The CI-SIDO converters have two MOSFETs with two gate pulses. It is found that the shift of one gate pulse with respect to the starting point of another gate pulse reduces the ripples in two inductor currents and input currents. The ripples in inductor currents reduce up to $92.46\%$ with respect to the zero shifting. The condition of the ripple-free input current is also proposed. This work also proposes a unified coupled inductor design with reduced inductor current ripples. An approach to design a CI-SIDO boost converter is also proposed such that the ripple in input current is either zero or less than the maximum specified ripple limit. It is further found that there is no undesirable effect of gate pulse shifting on any of the variables of the CI-SIDO converter, such as the average value of inductor current, input current, and output voltage ripples. Also, the range of CCM operation increases as the shifting is introduced by decreasing the CCM/DCM boundary. The discontinuous conduction mode (DCM) of the CI-SIDO boost converter is also analysed. The input-output voltage relations of DCM are found, and the effect of change in load currents, input voltages and duty ratios are analysed for all possibilities of the CI-SIDO boost converter.
URI: http://hdl.handle.net/10603/459892
Appears in Departments:DEPARTMENT OF ELECTRONICS AND ELECTRICAL ENGINEERING

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