Investigations on low power design techniques for content addressable memory

Abstract

Content addressable memory (CAM) is used in high speed searching applications and also in data compression. Recently in the network computing era, fast lookup tables are required for address resolution in network switches and routers such as LAN bridges/switches, ATM switches, and layer-3 switches. Increasing applications of CAM include reconfigurable computing platforms, neuromorphic associative memories, analytics, gene pattern searching in bioinformatics, text mining and signal processing in wearable/implantable systems. The combined effect of higher density and lower power creates the possibility of larger size CAM implementations, which can be beneficial in many application domains. newlineThe massive number of comparison operations needed by CAMs consumes an oversized quantity of power. In a typical use, a CAM has only one or a small number of matches and most words mismatch. Since mismatches dominate, this leads to high power consumption. The energy per search operation increases linearly with the CAM storage capacity. As CAM applications grow, which demands larger CAM sizes, the power problem is further exacerbated. Reducing power consumption, without sacrificing speed or area, is the main threat of recent research in large-capacity CAMs. newlineTo reduce the power consumption at the architecture level, the precomputation based Binary CAM was designed using Bitwise AND Remainder Function as a Parameter extractor. The Remainder Function is applied as a parameter extractor that performs the modulo operation. newline