Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/456237
Title: Computational Geometry Analysis of ASIC Layouts and Defect Detection in Fabrication
Researcher: Abhishek Vikram
Guide(s): Agarwal, Vineeta
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Motilal Nehru National Institute of Technology
Completed Date: 2016
Abstract: Available newline
Pagination: i;117p.
URI: http://hdl.handle.net/10603/456237
Appears in Departments:Department of Electrical Engineering

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80_recommendation.pdfAttached File2.57 MBAdobe PDFView/Open
abstract.pdf521.01 kBAdobe PDFView/Open
annexures.pdf425.29 kBAdobe PDFView/Open
chapter_1.pdf427.88 kBAdobe PDFView/Open
chapter_2.pdf824.3 kBAdobe PDFView/Open
chapter_3.pdf613.04 kBAdobe PDFView/Open
chapter_4.pdf929.28 kBAdobe PDFView/Open
chapter_5.pdf681.1 kBAdobe PDFView/Open
chapter_6.pdf441.95 kBAdobe PDFView/Open
prelim pages.pdf1.1 MBAdobe PDFView/Open
table of content.pdf578.4 kBAdobe PDFView/Open
title page.pdf101.37 kBAdobe PDFView/Open
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