Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/455246
Title: Techniques for improving leakages and row hammer failure in nano scale dram transistor
Researcher: Gautam, Satendra Kumar
Guide(s): Manhas, Sanjeev Kumar
Keywords: Computer Science
Engineering and Technology
Telecommunications
University: Indian Institute of Technology Roorkee
Completed Date: 2021
Abstract: Available newline newline
Pagination: xxii, 120 p.
URI: http://hdl.handle.net/10603/455246
Appears in Departments:Department of Electronics and Communication Engineering

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01_title.pdfAttached File70.56 kBAdobe PDFView/Open
02_prelim pages.pdf2.36 MBAdobe PDFView/Open
03_abstract.pdf467.88 kBAdobe PDFView/Open
04_chapters 1-7.pdf3.99 MBAdobe PDFView/Open
05_annexures.pdf1.91 MBAdobe PDFView/Open
80_recommendation.pdf839.75 kBAdobe PDFView/Open
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