1. Shodhganga@INFLIBNET
  2. Maulana Azad National Institute of Technology Bhopal
  3. Electrical Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/454540
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2023-01-30T07:19:03Z-
dc.date.available2023-01-30T07:19:03Z-
dc.identifier.urihttp://hdl.handle.net/10603/454540-
dc.description.abstractnewline
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleInvestigations on emerging fault tolerant multilevel inverter topologies
dc.title.alternative
dc.creator.researcherKumar, Dhananjay
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.note
dc.contributor.guideNema, R K and Gupta, Sushma
dc.publisher.placeBhopal
dc.publisher.universityMaulana Azad National Institute of Technology Bhopal
dc.publisher.institutionElectrical Engineering
dc.date.registered
dc.date.completed2022
dc.date.awarded2022
dc.format.dimensions
dc.format.accompanyingmaterialDVD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Electrical Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File102.44 kBAdobe PDFView/Open
02_prelim pages.pdf589.59 kBAdobe PDFView/Open
03_content.pdf105.73 kBAdobe PDFView/Open
04_abstract.pdf129.07 kBAdobe PDFView/Open
05_chapter-1.pdf904.36 kBAdobe PDFView/Open
06_chapter-2.pdf2.33 MBAdobe PDFView/Open
07_chapter-3.pdf2.13 MBAdobe PDFView/Open
08_chapter-4.pdf2.02 MBAdobe PDFView/Open
09_chapter-5.pdf4.36 MBAdobe PDFView/Open
10_chapter-6.pdf369.52 kBAdobe PDFView/Open
11_chapter-7.pdf233.42 kBAdobe PDFView/Open
12_annexures.pdf1 MBAdobe PDFView/Open
80_recommendation.pdf335.08 kBAdobe PDFView/Open
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