1. Shodhganga@INFLIBNET
  2. Indian Institute of Technology Ropar
  3. Department of Electrical Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/454424
Title: Signal integrity analysis of high speed on chip and chip to chip copper interconnects
Researcher: Pathania, Sunil
Guide(s): Sharma, Rohit Y
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Indian Institute of Technology Ropar
Completed Date: 2022
Abstract: Included
Pagination: 
URI: http://hdl.handle.net/10603/454424
Appears in Departments:Department of Electrical Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File46.14 kBAdobe PDFView/Open
02_prelim pages.pdf663.85 kBAdobe PDFView/Open
03_content.pdf163.02 kBAdobe PDFView/Open
04_abstract.pdf111.74 kBAdobe PDFView/Open
05_chapter 1.pdf397.69 kBAdobe PDFView/Open
06_chapter 2.pdf650.48 kBAdobe PDFView/Open
07_chapter 3.pdf1.51 MBAdobe PDFView/Open
08_chapter 4.pdf1.58 MBAdobe PDFView/Open
09_chapter 5.pdf741.52 kBAdobe PDFView/Open
10_annexures.pdf373.58 kBAdobe PDFView/Open
11_chapter 6.pdf1.73 MBAdobe PDFView/Open
80_recommendation.pdf332.71 kBAdobe PDFView/Open
Show full item record


Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).

Altmetric Badge: