Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/450747
Title: Some test strategies for 3D integrated circuits
Researcher: Kaibartta, Tanusree
Guide(s): Biswas, G P
Keywords: Computer Science
Computer Science Software Engineering
Engineering and Technology
University: Indian Institute of Technology (ISM), Dhanbad
Completed Date: 2022
Abstract: Available newline
Pagination: 
URI: http://hdl.handle.net/10603/450747
Appears in Departments:Department of Computer Science and Engineering

Files in This Item:
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01_title.pdfAttached File77.68 kBAdobe PDFView/Open
02_prelim pages.pdf5.43 MBAdobe PDFView/Open
03_table of contents.pdf52.08 kBAdobe PDFView/Open
04_abstract.pdf50.55 kBAdobe PDFView/Open
05_chapter1.pdf294.74 kBAdobe PDFView/Open
06_chapter2.pdf286.46 kBAdobe PDFView/Open
07_chapter3.pdf759.08 kBAdobe PDFView/Open
08_chapter4.pdf486.03 kBAdobe PDFView/Open
09_chapter5.pdf428.46 kBAdobe PDFView/Open
10_chapter6.pdf502.12 kBAdobe PDFView/Open
11_chapter7.pdf52.97 kBAdobe PDFView/Open
12_annexure.pdf127.7 kBAdobe PDFView/Open
80_recommendation.pdf129.62 kBAdobe PDFView/Open
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