1. Shodhganga@INFLIBNET
  2. National Institute of Technology (NIT), Warangal
  3. Department of Electronics and Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/450685
Title: Low Power and Area Efficient Finite Field Multiplication Architectures for Cryptographic Applications
Researcher: Mathe, Sudha Ellison
Guide(s): Lakshmi, B.
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: National Institute of Technology Warangal
Completed Date: 2018
Abstract: File Attached newline
Pagination: xviii, 140 p.
URI: http://hdl.handle.net/10603/450685
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File118.61 kBAdobe PDFView/Open
02_prelim pages.pdf491.6 kBAdobe PDFView/Open
03_content.pdf106.29 kBAdobe PDFView/Open
04_abstract.pdf124.6 kBAdobe PDFView/Open
05_chapter 1.pdf153.92 kBAdobe PDFView/Open
06_chapter 2.pdf251.83 kBAdobe PDFView/Open
07_chapter 3.pdf229.67 kBAdobe PDFView/Open
08_chapter 4.pdf11.14 MBAdobe PDFView/Open
09_chapter 5.pdf12.18 MBAdobe PDFView/Open
10_chapter 6.pdf9.01 MBAdobe PDFView/Open
11_chapter 7.pdf139.7 kBAdobe PDFView/Open
12_annexures.pdf285.67 kBAdobe PDFView/Open
80_recommendation.pdf240.62 kBAdobe PDFView/Open
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