Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/448609
Title: High Performance VLSI Architectures for Power of two and Non Power of two Size DFT Computations
Researcher: S., Bibin Sam Paul
Guide(s): G., Lakshminarayanan
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: National Institute of Technology Tiruchirappalli
Completed Date: 2021
Abstract: newline
Pagination: xviii, 96 pages
URI: http://hdl.handle.net/10603/448609
Appears in Departments:Department of Electronics and Communication Engineering

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01_title.pdfAttached File28.3 kBAdobe PDFView/Open
02_prelim.pdf149.89 kBAdobe PDFView/Open
03_content.pdf62.71 kBAdobe PDFView/Open
04_abstract.pdf44.85 kBAdobe PDFView/Open
05_chapter 1.pdf127.91 kBAdobe PDFView/Open
06_chapter 2.pdf191.8 kBAdobe PDFView/Open
07_chapter 3.pdf377.46 kBAdobe PDFView/Open
08_chapter 4.pdf305.33 kBAdobe PDFView/Open
09_chapter 5.pdf532.19 kBAdobe PDFView/Open
10_annexures.pdf52.06 kBAdobe PDFView/Open
80_recommendation.pdf62.19 kBAdobe PDFView/Open
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