Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/447237
Title: | Highly stable low power and error tolerant SRAM memory design for wireless sensor node and FPGA |
Researcher: | Sharma, Vishal |
Guide(s): | Vishvakarma, Santosh Kumar |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Indian Institute of Technology Indore |
Completed Date: | 2019 |
Abstract: | Available newline |
Pagination: | 153p. |
URI: | http://hdl.handle.net/10603/447237 |
Appears in Departments: | Department of Electrical Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_title.pdf | Attached File | 80.73 kB | Adobe PDF | View/Open |
02_prelim pages.pdf | 261.58 kB | Adobe PDF | View/Open | |
03_contents.pdf | 112.42 kB | Adobe PDF | View/Open | |
04_abstract.pdf | 564.88 kB | Adobe PDF | View/Open | |
05_chapter 1.pdf | 4.96 MB | Adobe PDF | View/Open | |
06_chapter 2.pdf | 1.72 MB | Adobe PDF | View/Open | |
07_chapter 3.pdf | 14.3 MB | Adobe PDF | View/Open | |
08_chapter 4.pdf | 18.02 MB | Adobe PDF | View/Open | |
09_chapter 5.pdf | 29.02 MB | Adobe PDF | View/Open | |
10_chapter 6.pdf | 6.25 MB | Adobe PDF | View/Open | |
11_annexure files.pdf | 260.49 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 276.21 kB | Adobe PDF | View/Open |
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