Implementation Of Fir Filter For Low Power And Area Reduction Using Vlsi

Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/446745

Full metadata record

DC Field	Value	Language
dc.coverage.spatial
dc.date.accessioned	2023-01-16T04:15:29Z	-
dc.date.available	2023-01-16T04:15:29Z	-
dc.identifier.uri	http://hdl.handle.net/10603/446745	-
dc.description.abstract	newline
dc.format.extent
dc.language	English
dc.relation
dc.rights	university
dc.title	Implementation Of Fir Filter For Low Power And Area Reduction Using Vlsi
dc.title.alternative
dc.creator.researcher	M Sumalatha
dc.subject.keyword	Engineering
dc.subject.keyword	Engineering and Technology
dc.subject.keyword	Engineering Electrical and Electronic
dc.description.note
dc.contributor.guide	P V Naganjaneyulu and K Satya Prasad
dc.publisher.place	Kakinada
dc.publisher.university	Jawaharlal Nehru Technological University, Kakinada
dc.publisher.institution	Department of Electronics and Communication Engineering
dc.date.registered	2014
dc.date.completed	2021
dc.date.awarded	2021
dc.format.dimensions
dc.format.accompanyingmaterial	DVD
dc.source.university	University
dc.type.degree	Ph.D.
Appears in Departments:	Department of Electronics and Communication Engineering

Files in This Item:

File	Description	Size	Format
01 title.pdf	Attached File	123.98 kB	Adobe PDF	View/Open
02 prelim pages.pdf		393.1 kB	Adobe PDF	View/Open
03 content.pdf		182.47 kB	Adobe PDF	View/Open
04 abstract.pdf		193.67 kB	Adobe PDF	View/Open
05 chapters.pdf		2.58 MB	Adobe PDF	View/Open
06 annexure.pdf		238.23 kB	Adobe PDF	View/Open
80_recommendation.pdf		370.39 kB	Adobe PDF	View/Open

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