Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/446745
Title: | Implementation Of Fir Filter For Low Power And Area Reduction Using Vlsi |
Researcher: | M Sumalatha |
Guide(s): | P V Naganjaneyulu and K Satya Prasad |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Jawaharlal Nehru Technological University, Kakinada |
Completed Date: | 2021 |
Abstract: | newline |
Pagination: | |
URI: | http://hdl.handle.net/10603/446745 |
Appears in Departments: | Department of Electronics and Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01 title.pdf | Attached File | 123.98 kB | Adobe PDF | View/Open |
02 prelim pages.pdf | 393.1 kB | Adobe PDF | View/Open | |
03 content.pdf | 182.47 kB | Adobe PDF | View/Open | |
04 abstract.pdf | 193.67 kB | Adobe PDF | View/Open | |
05 chapters.pdf | 2.58 MB | Adobe PDF | View/Open | |
06 annexure.pdf | 238.23 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 370.39 kB | Adobe PDF | View/Open |
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