Shodhganga : a reservoir of Indian theses @ INFLIBNET
The Shodhganga@INFLIBNET Centre provides a platform for research students to deposit their Ph.D. theses and make it available to the entire scholarly community in open access.
Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/445682
| Title: | High Performance VLSI Architectures for Successive Cancellation Decoding of Polar Codes |
| Researcher: | J., Sujanth Roy |
| Guide(s): | G., Lakshminarayanan |
| Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
| University: | National Institute of Technology Tiruchirappalli |
| Completed Date: | 2022 |
| Abstract: | newline |
| Pagination: | xiii, 67 pages |
| URI: | http://hdl.handle.net/10603/445682 |
| Appears in Departments: | Department of Electronics and Communication Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 01_title.pdf | Attached File | 186.45 kB | Adobe PDF | View/Open |
| 02_prelim.pdf | 421.32 kB | Adobe PDF | View/Open | |
| 03_content.pdf | 333.52 kB | Adobe PDF | View/Open | |
| 04_abstract.pdf | 234.16 kB | Adobe PDF | View/Open | |
| 05_chapter 1.pdf | 375.58 kB | Adobe PDF | View/Open | |
| 06_chapter 2.pdf | 791.78 kB | Adobe PDF | View/Open | |
| 07_chapter 3.pdf | 519.84 kB | Adobe PDF | View/Open | |
| 08_chapter 4.pdf | 690.06 kB | Adobe PDF | View/Open | |
| 09_chapter 5.pdf | 849.58 kB | Adobe PDF | View/Open | |
| 10_chapter 6.pdf | 237.1 kB | Adobe PDF | View/Open | |
| 11_annexures.pdf | 316.59 kB | Adobe PDF | View/Open | |
| 80_recommendation.pdf | 274.05 kB | Adobe PDF | View/Open |
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