1. Shodhganga@INFLIBNET
  2. J. C. Bose University of Science and Technology, YMCA, Faridabad
  3. Department of Electronics Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/445066
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2023-01-13T07:12:24Z-
dc.date.available2023-01-13T07:12:24Z-
dc.identifier.urihttp://hdl.handle.net/10603/445066-
dc.description.abstractnewline
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleAnalytical Study of MOS Device For Leakage Reduction In Low Power Circuit
dc.title.alternative
dc.creator.researcherKumar, Prashant
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.note
dc.contributor.guideVashishath, Munish and Bansal, PK
dc.publisher.placeFaridabad
dc.publisher.universityJ.C. Bose University of Science and Technology, YMCA
dc.publisher.institutionDepartment of Electronics Engineering
dc.date.registered2012
dc.date.completed2021
dc.date.awarded2021
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Electronics Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File27.98 kBAdobe PDFView/Open
02_prelim pages.pdf263.71 kBAdobe PDFView/Open
03_content.pdf87.85 kBAdobe PDFView/Open
04_abstract.pdf44.24 kBAdobe PDFView/Open
05_chapter 1.pdf841.33 kBAdobe PDFView/Open
06_chapter 2.pdf155.8 kBAdobe PDFView/Open
07_chapter 3.pdf1.28 MBAdobe PDFView/Open
08_chapter 4.pdf1.3 MBAdobe PDFView/Open
09_chapter 5.pdf715.42 kBAdobe PDFView/Open
10_chapter 6.pdf157.61 kBAdobe PDFView/Open
11_annexures.pdf306.46 kBAdobe PDFView/Open
80_recommendation.pdf184.13 kBAdobe PDFView/Open
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