Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/444607
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2023-01-13T04:42:06Z-
dc.date.available2023-01-13T04:42:06Z-
dc.identifier.urihttp://hdl.handle.net/10603/444607-
dc.description.abstractAvailable newline
dc.format.extent172p.
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleDesign techniques for bias temperature instability aware and soft error resilient nanoscale circuits
dc.title.alternative
dc.creator.researcherShah, Ambika Prasad
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.noteTH204
dc.contributor.guideVishvakarma, Santosh Kumar
dc.publisher.placeIndore
dc.publisher.universityIndian Institute of Technology Indore
dc.publisher.institutionDepartment of Electrical Engineering
dc.date.registered2016
dc.date.completed2019
dc.date.awarded2019
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Electrical Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File84.61 kBAdobe PDFView/Open
02_prelim pages.pdf374.4 kBAdobe PDFView/Open
03_contents.pdf138.92 kBAdobe PDFView/Open
04_abstract.pdf54.19 kBAdobe PDFView/Open
05_chapter 1.pdf610.44 kBAdobe PDFView/Open
06_chapter 2.pdf1.53 MBAdobe PDFView/Open
07_chapter 3.pdf887.84 kBAdobe PDFView/Open
08_chapter 4.pdf1.02 MBAdobe PDFView/Open
09_chapter 5.pdf1.32 MBAdobe PDFView/Open
10_chapter 6.pdf722.28 kBAdobe PDFView/Open
11_chapter 7.pdf1.38 MBAdobe PDFView/Open
12_chapter 8.pdf824.63 kBAdobe PDFView/Open
13_annexure files.pdf331.94 kBAdobe PDFView/Open
80_recommendation.pdf300.14 kBAdobe PDFView/Open


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