1. Shodhganga@INFLIBNET
  2. Indian Institute of Technology Bombay
  3. Department of Electrical Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/443750
Title: Characterization and modeling of bias temperature instability and hot carrier degradation in gate all around stacked nano sheet transistors
Researcher: Choudhury, Nilotpal
Guide(s): Mahapatra, Souvik
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Indian Institute of Technology Bombay
Completed Date: 2022
Abstract: Abstract attached newline newline
Pagination: NA
URI: http://hdl.handle.net/10603/443750
Appears in Departments:Department of Electrical Engineering

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01_title.pdfAttached File18.96 kBAdobe PDFView/Open
02_prelimpages.pdf205 kBAdobe PDFView/Open
03_abstract.pdf23.68 kBAdobe PDFView/Open
04_contents.pdf527.58 kBAdobe PDFView/Open
05_chapter_1.pdf776.4 kBAdobe PDFView/Open
06_chapter_2.pdf2.82 MBAdobe PDFView/Open
07_chapter_3.pdf3.41 MBAdobe PDFView/Open
08_chapter_4.pdf415.84 kBAdobe PDFView/Open
09_chapter_5.pdf1.32 MBAdobe PDFView/Open
10_chapter_6.pdf605.01 kBAdobe PDFView/Open
11_chapter_7.pdf618.73 kBAdobe PDFView/Open
12_chapter_8.pdf581.58 kBAdobe PDFView/Open
13_chapter_9.pdf647.42 kBAdobe PDFView/Open
14_chapter_10.pdf363.63 kBAdobe PDFView/Open
16_appendix.pdf276.86 kBAdobe PDFView/Open
80_recommendation.pdf202.97 kBAdobe PDFView/Open
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