Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/442979
Title: | Design exploration and VLSI implementation of deep neural network accelerator with configurable architecture |
Researcher: | Raut, Gopal R. |
Guide(s): | Vishvakarma, Santosh Kumar |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Indian Institute of Technology Indore |
Completed Date: | 2022 |
Abstract: | Available newline |
Pagination: | 153p. |
URI: | http://hdl.handle.net/10603/442979 |
Appears in Departments: | Department of Electrical Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_title.pdf | Attached File | 138.98 kB | Adobe PDF | View/Open |
02_prelim pages.pdf | 854.94 kB | Adobe PDF | View/Open | |
03_contents.pdf | 119.73 kB | Adobe PDF | View/Open | |
04_abstract.pdf | 119.67 kB | Adobe PDF | View/Open | |
05_chapter 1.pdf | 1.49 MB | Adobe PDF | View/Open | |
06_chapter 2.pdf | 2.24 MB | Adobe PDF | View/Open | |
07_chapter 3.pdf | 2.11 MB | Adobe PDF | View/Open | |
08_chapter 4.pdf | 1.8 MB | Adobe PDF | View/Open | |
09_chapter 5.pdf | 4.72 MB | Adobe PDF | View/Open | |
10_chapter 6.pdf | 3.48 MB | Adobe PDF | View/Open | |
11_chapter 7.pdf | 1.74 MB | Adobe PDF | View/Open | |
12_annexures files.pdf | 970.18 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 272.01 kB | Adobe PDF | View/Open |
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