Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/442979
Title: Design exploration and VLSI implementation of deep neural network accelerator with configurable architecture
Researcher: Raut, Gopal R.
Guide(s): Vishvakarma, Santosh Kumar
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Indian Institute of Technology Indore
Completed Date: 2022
Abstract: Available newline
Pagination: 153p.
URI: http://hdl.handle.net/10603/442979
Appears in Departments:Department of Electrical Engineering

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01_title.pdfAttached File138.98 kBAdobe PDFView/Open
02_prelim pages.pdf854.94 kBAdobe PDFView/Open
03_contents.pdf119.73 kBAdobe PDFView/Open
04_abstract.pdf119.67 kBAdobe PDFView/Open
05_chapter 1.pdf1.49 MBAdobe PDFView/Open
06_chapter 2.pdf2.24 MBAdobe PDFView/Open
07_chapter 3.pdf2.11 MBAdobe PDFView/Open
08_chapter 4.pdf1.8 MBAdobe PDFView/Open
09_chapter 5.pdf4.72 MBAdobe PDFView/Open
10_chapter 6.pdf3.48 MBAdobe PDFView/Open
11_chapter 7.pdf1.74 MBAdobe PDFView/Open
12_annexures files.pdf970.18 kBAdobe PDFView/Open
80_recommendation.pdf272.01 kBAdobe PDFView/Open
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