1. Shodhganga@INFLIBNET
  2. Babasaheb Bhimrao Ambedkar Bihar University
  3. SCIENCE
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/442597
Title: Efficient stepper motor torque ripple minimization using fpga hardware implementation
Researcher: GYANESH
Guide(s): RAM KISHORE SINGH
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Babasaheb Bhimrao Ambedkar Bihar University
Completed Date: 2015
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/442597
Appears in Departments:SCIENCE

Files in This Item:
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01_title_2.pdfAttached File336.32 kBAdobe PDFView/Open
02_certificate.pdf258.06 kBAdobe PDFView/Open
03_contents.pdf176.45 kBAdobe PDFView/Open
05_chapter_1.pdf874.39 kBAdobe PDFView/Open
05_chapter_2.pdf6.62 MBAdobe PDFView/Open
05_chapter_3.pdf3.58 MBAdobe PDFView/Open
05_chapter_4.pdf2.28 MBAdobe PDFView/Open
05_chapter_5(conclusion).pdf2.34 MBAdobe PDFView/Open
05_chapter_6.pdf2.03 MBAdobe PDFView/Open
05_chapter_7.pdf198.87 kBAdobe PDFView/Open
11_acknowledgement.pdf429.98 kBAdobe PDFView/Open
13_reference.pdf260.83 kBAdobe PDFView/Open
80_recommendation.pdf2.34 MBAdobe PDFView/Open
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