Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/442323
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dc.coverage.spatial
dc.date.accessioned2023-01-11T09:37:42Z-
dc.date.available2023-01-11T09:37:42Z-
dc.identifier.urihttp://hdl.handle.net/10603/442323-
dc.description.abstractAvailable
dc.format.extentxviii,124p.
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleDevelopment of High Performance Hardware Architectures for Optimized Motion Estimation Algorithms for High Efficiency Video Coding
dc.title.alternative
dc.creator.researcherGogoi, Sushanta
dc.subject.keywordEfficiency Video Coding
dc.subject.keywordEstimation Algorithms
dc.subject.keywordHardware Architectures
dc.description.note
dc.contributor.guideRangababu, P.
dc.publisher.placeShillong
dc.publisher.universityNational Institute of Technology (NIT) Meghalaya
dc.publisher.institutionELECTRONICS and COMMUNICATION ENGINEERING
dc.date.registered2017
dc.date.completed2022
dc.date.awarded2022
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:ELECTRONICS & COMMUNICATION ENGINEERING

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File37.11 kBAdobe PDFView/Open
02_prelim pages.pdf445.14 kBAdobe PDFView/Open
03_content.pdf103.91 kBAdobe PDFView/Open
04_abstract.pdf78.43 kBAdobe PDFView/Open
05_chapter 1.pdf809.03 kBAdobe PDFView/Open
06_chapter 2.pdf1.18 MBAdobe PDFView/Open
07_chapter 3.pdf576.91 kBAdobe PDFView/Open
08_chapter 4.pdf5.23 MBAdobe PDFView/Open
09_chapter 5.pdf17.43 MBAdobe PDFView/Open
10_chapter 6.pdf4.86 MBAdobe PDFView/Open
11_chapter 7.pdf140.29 kBAdobe PDFView/Open
12_annexures.pdf215.28 kBAdobe PDFView/Open
80_recommendation.pdf176.24 kBAdobe PDFView/Open


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