Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/440124
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dc.coverage.spatial
dc.date.accessioned2023-01-09T12:24:38Z-
dc.date.available2023-01-09T12:24:38Z-
dc.identifier.urihttp://hdl.handle.net/10603/440124-
dc.description.abstractnewline
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleDesign and Reliability Analysis of Multistage Interconnection Network for Multiprocessor Systems
dc.title.alternative
dc.creator.researcherAmit Prakash
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.note
dc.contributor.guideYadav,Dilip Kumar and Choubey,Arvind.
dc.publisher.placeJamshedpur
dc.publisher.universityNational Institute of Technology Jamshedpur
dc.publisher.institutionDepartment of Electronics and Communication Engineering
dc.date.registered2017
dc.date.completed2020
dc.date.awarded2020
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File440.69 kBAdobe PDFView/Open
02_prelim pages.pdf642.52 kBAdobe PDFView/Open
03_content.pdf410.57 kBAdobe PDFView/Open
04_abstract.pdf85.69 kBAdobe PDFView/Open
05_chapter 1.pdf322.8 kBAdobe PDFView/Open
06_chapter 2.pdf1.75 MBAdobe PDFView/Open
07_chapter 3.pdf1.93 MBAdobe PDFView/Open
08_chapter 4.pdf2.03 MBAdobe PDFView/Open
09_chapter 5.pdf2.61 MBAdobe PDFView/Open
10_chapter 6.pdf1.52 MBAdobe PDFView/Open
11_chapter 7.pdf1.81 MBAdobe PDFView/Open
12_chapter 8.pdf15.07 MBAdobe PDFView/Open
13_chapter 9.pdf328.49 kBAdobe PDFView/Open
14_annexures.pdf1.51 MBAdobe PDFView/Open
80_recommendation.pdf328.49 kBAdobe PDFView/Open


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