Analog circuit fault detection using soft computing techniques

Abstract

Analog electronic circuits have gained more importance with the recent advancements in the System-on-Chip (SOC) technology. The advances in the deep sub-micron level makes IC s complex and testing on these small IC s needs complex functionality ,so testing becomes a very challenging task under the constraints of high quality and low price. Many automatic testing tools are available for fault diagnosis in digital circuits but only limited number of fault diagnosis techniques is available for analog circuits. Fault diagnosis in analog circuit is challenging because of factors like tolerance effects of analog components, limited number of test nodes, poor fault models and nonlinearity issues. Accessing of nodes in the testing process can be eliminated by using simulation based methods. Parametric or soft faults occur in the circuits due to variation in component values which degrades the system performance and catastrophic or hard faults are due to open or short circuits which lead to complete malfunctioning of the circuit. Many research works are carried out to give solutions for analog circuit testing challenges such as tolerance limits of component values, testable group determination, test node selection, minimization of size of fault dictionary and test frequency selection in frequency domain testing. newlineThe objective of this work is to diagnose parametric and catastrophic faults in linear analog circuits based on Simulation Before Test (SBT) method. Fault dictionary technique is a type of SBT method is used for parametric and catastrophic fault diagnosis in linear analog circuits in this work. Fault dictionary for parametric fault diagnosis is constructed using transfer function parameters and frequency response plots. The fault dictionary for hard faults is constructed by simulating the circuit with open and short circuit faults to obtain the features for fault diagnosis. newline