Modeling simulation and analysis of junctionless MOSFETs

Abstract

Gardon Moore proposed the exponential growth of transistor newlinepackage density on chips. For the past decades the semiconductor industry has newlinebeen coping up with this exponential growth. But, in order to meet the newlinetechnology needs, further downscaling of devices is essential to improve the newlinespeed, cost and power consumption of Complementary Metal Oxide newlineSemiconductor (CMOS) devices which has conquered the entire electronics newlineindustry. The continuous shrinking of device dimensions has fueled to newlinemaintain the sustained growth in Very Large Scale Integration (VLSI) newlinetechnology. The entire computation process for communication, automobile newlinebased applications have been done with the help of CMOS Integrated Circuits newline(ICs) which provide superior performance by means of diminished cost per newlinefunction and smaller physical size compared to its predecessors. In case of newlineperformance perspective the conventional Metal Oxide Semiconductor Field newlineEffect Transistors (MOSFETs) was not favorable while scaling down to newlinenanoscale regime due to its complimentary doping profile at the channel and newlinesource/drain regions along with the abrupt doping changes in the sourcechannel newlineand channel-drain interface. Furthermore, it is highly difficult to newlineachieve such an ultra steep doping profile. newlineIn order to address these challenges a new novel device called newlineJunctionless MOSFETs has been introduced. It is a new emerging device that newlinecan potentially withstand the downscaling of CMOS technology as it has newlineexcellent gate control, low leakage current, expected improvement in carrier newlinetransportation, in addition to easier manufacturing processes. newline