Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/434746
Title: | Quantum Circuit Realization Optimization and Placement with Improved Fault Tolerance |
Researcher: | Kole, Abhoy |
Guide(s): | Gupta, Indranil Sen and Das, Partha Pratim |
Keywords: | Engineering Engineering and Technology Engineering Multidisciplinary |
University: | Indian Institute of Technology Kharagpur |
Completed Date: | 2021 |
Abstract: | newline |
Pagination: | |
URI: | http://hdl.handle.net/10603/434746 |
Appears in Departments: | Rajendra Mishra School of Engg Entrepreneurship |
Files in This Item:
File | Description | Size | Format | |
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01_title.pdf | Attached File | 255.24 kB | Adobe PDF | View/Open |
04_abstract.pdf | 74.27 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 4.16 MB | Adobe PDF | View/Open |
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