1. Shodhganga@INFLIBNET
  2. National Institute of Technology (NIT) Meghalaya
  3. ELECTRONICS & COMMUNICATION ENGINEERING
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/433117
Title: Development of High Performance Stream Processing Hardware Architectures for Deblocking Filter in High Efficiency Video Coding
Researcher: Swamy, Baldev
Guide(s): Rangababu, P.
Keywords: Advanced Video Coding
High-Efficiency Video Coding
University: National Institute of Technology (NIT) Meghalaya
Completed Date: 2021
Abstract: Available newline
Pagination: xvi, 130p.
URI: http://hdl.handle.net/10603/433117
Appears in Departments:ELECTRONICS & COMMUNICATION ENGINEERING

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File Description SizeFormat 
01_title page.pdfAttached File70.54 kBAdobe PDFView/Open
02_prelim pages.pdf494.59 kBAdobe PDFView/Open
03_content.pdf97.13 kBAdobe PDFView/Open
04_abstract.pdf74.5 kBAdobe PDFView/Open
05_chapter 1.pdf570.93 kBAdobe PDFView/Open
06_chapter 2.pdf780.2 kBAdobe PDFView/Open
07_chapter 3.pdf1.92 MBAdobe PDFView/Open
08_chapter 4.pdf1.28 MBAdobe PDFView/Open
09_chapter 5.pdf1.65 MBAdobe PDFView/Open
10_chapter 6.pdf1.78 MBAdobe PDFView/Open
11_chapter 7.pdf161.27 kBAdobe PDFView/Open
12_annexures.pdf224.03 kBAdobe PDFView/Open
80_recommendation.pdf241.98 kBAdobe PDFView/Open
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