Shodhganga : a reservoir of Indian theses @ INFLIBNET
The Shodhganga@INFLIBNET Centre provides a platform for research students to deposit their Ph.D. theses and make it available to the entire scholarly community in open access.
Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/430675
| Title: | TCAD Simulation Based Device and Circuit Level Performance Analysis of Source Pocket Engineered GaSb Si Heterojunction Vertical TFETs |
| Researcher: | Tripathy, Manas Ranjan |
| Guide(s): | Jit, Satyabrata |
| Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
| University: | Indian Institute of Technology IIT (BHU), Varanasi |
| Completed Date: | 2020 |
| Abstract: | The abstract is available in the attachment. newline |
| Pagination: | xxxvi,164 |
| URI: | http://hdl.handle.net/10603/430675 |
| Appears in Departments: | Electronics Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 01_title page.pdf | Attached File | 1.84 MB | Adobe PDF | View/Open |
| 02_preliminary page.pdf | 5.76 MB | Adobe PDF | View/Open | |
| 03_content.pdf | 4.32 MB | Adobe PDF | View/Open | |
| 04_abstract.pdf | 1.22 MB | Adobe PDF | View/Open | |
| 05_chapter 01.pdf | 15.36 MB | Adobe PDF | View/Open | |
| 06_chapter 02.pdf | 14.44 MB | Adobe PDF | View/Open | |
| 07_chapter 03.pdf | 8.75 MB | Adobe PDF | View/Open | |
| 08_chapter 04.pdf | 5.69 MB | Adobe PDF | View/Open | |
| 09_chapter 05.pdf | 5.28 MB | Adobe PDF | View/Open | |
| 10_chapter 06.pdf | 1.23 MB | Adobe PDF | View/Open | |
| 11_annexure.pdf | 5.99 MB | Adobe PDF | View/Open | |
| 80_recommendation.pdf | 3.07 MB | Adobe PDF | View/Open |
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