1. Shodhganga@INFLIBNET
  2. Indian Institute of Technology Kharagpur
  3. Electronics and Electrical Communication Engg
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/429023
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2022-12-21T05:18:59Z-
dc.date.available2022-12-21T05:18:59Z-
dc.identifier.urihttp://hdl.handle.net/10603/429023-
dc.description.abstractnewline
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleAlgorithms and Architectures for Structured Low Density Parity Check Codes
dc.title.alternative
dc.creator.researcherShantharam, Kalipatnapu
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.note
dc.contributor.guideChakrabarti, Indrajit
dc.publisher.placeKharagpur
dc.publisher.universityIndian Institute of Technology Kharagpur
dc.publisher.institutionElectronics and Electrical Communication Engg
dc.date.registered
dc.date.completed2021
dc.date.awarded2021
dc.format.dimensions
dc.format.accompanyingmaterialDVD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Electronics and Electrical Communication Engg

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01_title.pdfAttached File268.64 kBAdobe PDFView/Open
04_abstract.pdf13.29 kBAdobe PDFView/Open
80_recommendation.pdf2.58 MBAdobe PDFView/Open
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