Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/428434
Title: Design and performance evaluation of gate engineered double gate junctionless mosfet structure for low power applications
Researcher: Mendiratta, Namrata
Guide(s): Tripathi, Suman Lata and Chander, Sweta
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Lovely Professional University
Completed Date: 2022
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/428434
Appears in Departments:Faculty of Technology and Sciences

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01_title.pdfAttached File153.98 kBAdobe PDFView/Open
02_prelim pages.pdf658.82 kBAdobe PDFView/Open
03_content.pdf267.97 kBAdobe PDFView/Open
04_abstract.pdf312.58 kBAdobe PDFView/Open
05_chapter 1.pdf760.28 kBAdobe PDFView/Open
06_chapter 2.pdf967.74 kBAdobe PDFView/Open
07_chapter 3.pdf1.03 MBAdobe PDFView/Open
08_chapter 4.pdf725.28 kBAdobe PDFView/Open
09_chapter 5.pdf1.54 MBAdobe PDFView/Open
10_annexures.pdf789.11 kBAdobe PDFView/Open
11_chapter 6.pdf715.61 kBAdobe PDFView/Open
12_chapter 7.pdf171.75 kBAdobe PDFView/Open
80_recommendation.pdf324.97 kBAdobe PDFView/Open
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