Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/427659
Title: Speed power and area efficient Design of multiplier and adder For 2d fir digital filter
Researcher: Dyana christilda, V
Guide(s): 
Keywords: Engineering and Technology
Engineering
Engineering Electrical and Electronic
University: Anna University
Completed Date: 2022
Abstract: Speed power and area efficient Design of multiplier and adder For 2d fir digital filter newline
Pagination: xv, 130p.
URI: http://hdl.handle.net/10603/427659
Appears in Departments:Faculty of Information and Communication Engineering

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01_title.pdfAttached File117.8 kBAdobe PDFView/Open
02_prelim pages.pdf1.38 MBAdobe PDFView/Open
03_content.pdf108.88 kBAdobe PDFView/Open
04_abstract.pdf179.84 kBAdobe PDFView/Open
05_chapter 1.pdf441.37 kBAdobe PDFView/Open
06_chapter 2.pdf290.5 kBAdobe PDFView/Open
07_chapter 3.pdf706.95 kBAdobe PDFView/Open
08_chapter 4.pdf422.48 kBAdobe PDFView/Open
09_chapter 5.pdf353.53 kBAdobe PDFView/Open
10_chapter 6.pdf487.02 kBAdobe PDFView/Open
11_annexures.pdf462.96 kBAdobe PDFView/Open
80_recommendation.pdf74.49 kBAdobe PDFView/Open
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