Adaptive Dielectric Thin Film Transistor A Self Configuring Device for Low Power Electrostatic Discharge Protection

Abstract

Large area and flexible electronic systems are widely used in applications such as displays, image sensors, wearable electronics, and energy harvesting systems. One of the fundamental functional blocks in these systems is the thin-film transistor (TFT), which suffers from poor field-effect mobility, electrical instability, etc. due to the state localization at low-temperature fabrication process, a criterion that enables system realization on glass or flexible substrate, such as plastic. The electrostatic discharge (ESD) is a rapid transfer of static charge between two objects of dissimilar potentials, one of which is typically grounded. An electronic device could suffer ESD damage during different stages of its lifetime including manufacturing and product usage leading to a loss of billions of dollars annually to the electronics industry. Since the ESD phenomenon is unavoidable, on-chip ESD protection devices or circuits are required. An ideal ESD protection device should offer a low resistance path to the surge current during an ESD event, but a high resistance path to the signal during the normal operation to minimize the power loss. In the crystalline CMOS technology, the parasitic bipolar turn-on (snapback) is effectively used to design the ESD protection device. However, most of the TFT technologies do not exhibit any bipolar turn-on owing to the poor mobility and lack of complementary devices. Hence, the conventional protection circuit uses large aspect-ratio diode-connected TFTs that offer a low resistance path to the surge current but also does the same to signals during normal system operation resulting in power loss. Additional circuits are required to keep the protection devices turned off during normal operation, but it leads to higher routing complexity, layout area, and multi-component reliability issues...