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http://hdl.handle.net/10603/426439
Title: | Development of an Automated Test and Parameter Extraction Tool for Active Matrix Displays |
Researcher: | Daniel, Sanil K |
Guide(s): | Sambandan, Sanjiv |
Keywords: | Physical Sciences Physics Physics Applied |
University: | Indian Institute of Science Bangalore |
Completed Date: | 2019 |
Abstract: | Active matrix backplanes used in at panel displays are prone to line faults (opens and shorts) and pixel faults (poor transistor performance and parameter variations). These faults could occur during fabrication or during operation. To improve the yield of a process line, it is important that the backplanes be free of most forms of error. Thus the testing of backplanes is a key aspect in the manufacturing chain. To address this, several system have been reported using different methodologies. However most of the technologies can only identify hard faults such as opens and shorts. Moreover many techniques require the presence of the photonic system (eg:- light emitting diode or liquid crystal display) integrated with the backplane. This thesis discuss the development of a system that not only identi fies hard line faults but also soft faults such as transistor parameter variations. The test system performs an electrical measurement in the back plane. This thesis primarily discusses the technique for testing LCD back plane. The LCD backplane pixels consists of a switch capacitor, with the TFT acting as the switch. The general algorithm of testing is to write data in the pixel capacitor and read out the charge for a given gate voltage applied to the pixel select TFT. This process is repeated for a sequence of gate voltages. This results in the measurement of the time averaged current(due to the discharging pixel capacitor) vs. gate voltage characteristics for each pixel select switch of the display. The key parameters of the TFT can be extracted from this plot. The thesis discussed the design and the development of the test system. Experiments of back plane testing are performed on amorphous silicon TFT arrays and experimental results and parameters extracted using the developed test system are compared with measurements made on the TFT using the Keithley 4200 semiconductor parameter analyser. The parameters extracted by the test system corroborates well with the parameters extracted by the Keithley 4200. While ... |
Pagination: | xxiv, 212 |
URI: | http://hdl.handle.net/10603/426439 |
Appears in Departments: | Instrumentaion and Applied Physics |
Files in This Item:
File | Description | Size | Format | |
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01_title.pdf | Attached File | 90.08 kB | Adobe PDF | View/Open |
02_prelim pages.pdf | 218.81 kB | Adobe PDF | View/Open | |
03_abstract.pdf | 48.74 kB | Adobe PDF | View/Open | |
04_table of contents.pdf | 112.5 kB | Adobe PDF | View/Open | |
05_chapter 1.pdf | 1.93 MB | Adobe PDF | View/Open | |
06_chapter 2.pdf | 741.35 kB | Adobe PDF | View/Open | |
07_chapter 3.pdf | 463.11 kB | Adobe PDF | View/Open | |
08_chapter 4.pdf | 2.56 MB | Adobe PDF | View/Open | |
09_chapter 5.pdf | 757.19 kB | Adobe PDF | View/Open | |
10_chapter 6.pdf | 877.74 kB | Adobe PDF | View/Open | |
11_chapter 7.pdf | 1.25 MB | Adobe PDF | View/Open | |
12_chapter 8.pdf | 1.92 MB | Adobe PDF | View/Open | |
13_chapter 9.pdf | 1.41 MB | Adobe PDF | View/Open | |
14_annexure.pdf | 2.27 MB | Adobe PDF | View/Open | |
80_recommendation.pdf | 192.37 kB | Adobe PDF | View/Open |
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