1. Shodhganga@INFLIBNET
  2. National Institute of Technology (NIT), Warangal
  3. Department of Electronics and Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/425957
Title: High Throughput and Area Efficient Finite Field GF 2m Multiplier Architectures for Internet of Things Security Algorithms
Researcher: P, Siva Ramakrishna
Guide(s): Lakshmi, B.
Keywords: Engineering
Engineering and Technology
Internet of Things
Multiplier Architectures
Security Algorithms
University: National Institute of Technology (NIT), Warangal
Completed Date: 2021
Abstract: Abstract Attached
Pagination: xvii, 129 p.
URI: http://hdl.handle.net/10603/425957
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File115.52 kBAdobe PDFView/Open
02_declaration.pdf63.53 kBAdobe PDFView/Open
03_certificate.pdf73.11 kBAdobe PDFView/Open
04_acknowledgement.pdf50.24 kBAdobe PDFView/Open
05_abstract.pdf86.32 kBAdobe PDFView/Open
06_content.pdf66.66 kBAdobe PDFView/Open
07_list of tables and figures.pdf148.79 kBAdobe PDFView/Open
08_abbreviations.pdf84.72 kBAdobe PDFView/Open
09_chapter 1.pdf305.22 kBAdobe PDFView/Open
10_chapter 2.pdf247.55 kBAdobe PDFView/Open
11_chapter 3.pdf270.72 kBAdobe PDFView/Open
12_chapter 4.pdf680.4 kBAdobe PDFView/Open
13_chapter 5.pdf651.66 kBAdobe PDFView/Open
14_chapter 6.pdf416.65 kBAdobe PDFView/Open
15_chapter 7.pdf101.96 kBAdobe PDFView/Open
16_bibliography.pdf147.23 kBAdobe PDFView/Open
80_recommendation.pdf199.79 kBAdobe PDFView/Open
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