Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/424232
Title: Modeling of Nanoscale MOSFETS and their Circuit Level Implementation
Researcher: Chatterjee, Arun Kumar
Guide(s): Prasad, B.
Keywords: Drain current model
Engineering
Engineering and Technology
Engineering Electrical and Electronic
Nanoscale
Quantum confinement
University: Thapar Institute of Engineering and Technology
Completed Date: 2019
Abstract: In this thesis work, an analytical model has been developed for a ballistic nanoscale metal oxide semiconductor field effect transistor (MOSFET). Ballistic operation signifies that the channel length of the device is less than the mean free path of the charge carriers, resulting in a transport phenomenon without the effects of carrier scattering. To achieve ballistic operation the said MOSFET has been modeled considering low temperature (77 K) and intrinsic silicon channel. The model is then compared with the numerical simulations to verify its functionality. In order to obtain the model for a ballistic nanoscale MOSFET structure, firstly, we present an analytical model for gate to channel capacitance (CGC) considering intrinsic silicon channel and a triangular potential well for electronic motion within the channel. This model incorporates quantum mechanical effects, drain induced barrier lowering (DIBL) and short channel effects (SCE). We evaluate the charge density in the channel using two-dimensional (2D) density of states and then solve 1D Schrodinger s wave equation to determine average separation charges from the interface which facilitates the evaluation of CGC. The evaluated CGC is then validated with the self-consistent results of Hareland et al. and van Dort s model. Next, the drain current is obtained employing the evaluated CGC within the framework of Landauer-Buttiker formalism and the device threshold voltage is estimated. The obtained model for ballistic MOSFET overestimates the available experimental data of a near ballistic bulk MOSFET. The effects due to surface roughness scattering and back scattering are then included in this model to obtain a model for a near ballistic bulk MOSFET. The I-V characteristics are compared with the experimental results and are found to be in good agreement.Further, a nanoscale near ballistic MOSFET is designed, considering intrinsic silicon channel at very low temperature, using SILVACO TCAD tool and the I-V characteristics are obtained. The obtained numerical si
Pagination: ix, 95p.
URI: http://hdl.handle.net/10603/424232
Appears in Departments:Department of Electronics and Communication Engineering

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01_title.pdfAttached File16.4 kBAdobe PDFView/Open
02_prelim pages.pdf595.27 kBAdobe PDFView/Open
03_content.pdf92.16 kBAdobe PDFView/Open
04_abstract.pdf269.05 kBAdobe PDFView/Open
05_chapter 1.pdf508.98 kBAdobe PDFView/Open
06_chapter 2.pdf254.98 kBAdobe PDFView/Open
07_chapter 3.pdf764.73 kBAdobe PDFView/Open
08_chapter 4.pdf672.46 kBAdobe PDFView/Open
09_chapter 5.pdf238 kBAdobe PDFView/Open
10_chapter 6.pdf99.26 kBAdobe PDFView/Open
11_annexures.pdf207.81 kBAdobe PDFView/Open
80_recommendation.pdf115.94 kBAdobe PDFView/Open
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