Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/423348
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DC FieldValueLanguage
dc.coverage.spatialElectronics and Communication
dc.date.accessioned2022-12-09T05:57:57Z-
dc.date.available2022-12-09T05:57:57Z-
dc.identifier.urihttp://hdl.handle.net/10603/423348-
dc.description.abstractAvailable newline
dc.format.extent142 p.
dc.languageEnglish
dc.relationNo. of references 210
dc.rightsuniversity
dc.titleDesign and development of non volatile alu using hybrid mtj cmos logic in memory architecture
dc.title.alternative_
dc.creator.researcherBarla, Prashanth
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.noteBibliography p. 112-131
dc.contributor.guideJoshi, Vinod Kumar and Bhat, Somashekara
dc.publisher.placeManipal
dc.publisher.universityManipal Academy of Higher Education
dc.publisher.institutionManipal Institute of Technology
dc.date.registered2019
dc.date.completed2022
dc.date.awarded2022
dc.format.dimensions-
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Manipal Institute of Technology

Files in This Item:
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01_title.pdfAttached File246.62 kBAdobe PDFView/Open
02_declaration.pdf419.73 kBAdobe PDFView/Open
03_certificates.pdf374.27 kBAdobe PDFView/Open
04_acknowledgement.pdf48.59 kBAdobe PDFView/Open
05_contents.pdf49.71 kBAdobe PDFView/Open
06_list of graph and table.pdf84.16 kBAdobe PDFView/Open
07_abstract.pdf49.22 kBAdobe PDFView/Open
08_chapter 1.pdf465.97 kBAdobe PDFView/Open
09_chapter 2.pdf471.11 kBAdobe PDFView/Open
10_chapter 3.pdf943.9 kBAdobe PDFView/Open
11_chapter 4.pdf1.24 MBAdobe PDFView/Open
12_chapter 5.pdf708.92 kBAdobe PDFView/Open
13_chapter 6.pdf407.08 kBAdobe PDFView/Open
14_abbreviations.pdf47.11 kBAdobe PDFView/Open
15_conclusion.pdf56.27 kBAdobe PDFView/Open
16_bibliography.pdf180.4 kBAdobe PDFView/Open
80_recommendation.pdf295.74 kBAdobe PDFView/Open


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