Efficient Mapping of Multithreaded Workloads onto Chip Multiprocessors

Abstract

Technology advancement in the area of IC design allows billions of transistors to be ona single chip which allows the developments of the modern days chip multiprocessorswith larger core counts in range of 100 cores or more The increased core count in achip multiprocessor urges the necessity of the high bandwidth memory and highspeedonchip interconnects To fulfill the needs of the chip multiprocessors many futuregenerations onchip interconnects as well as memory designs have been pr