Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/419933
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dc.coverage.spatialElectronics and Electrical Engineering
dc.date.accessioned2022-11-17T07:29:19Z-
dc.date.available2022-11-17T07:29:19Z-
dc.identifier.urihttp://hdl.handle.net/10603/419933-
dc.description.abstractThe scope of this thesis work is motivated by implementation challenges of designing low power analog circuits for front end amplifiers and area efficient spike detector for neural recording microsystems The key challenge in the design of neural amplifier is large input DC offsets associated with the electrodes Neural signals superimposed on these offsets saturates the amplifier 8482 s front end One of the solution is to improve input linear range in order to accommodate offset voltages of up to newline newline
dc.format.extentNot Available
dc.languageEnglish
dc.relationNot Available
dc.rightsself
dc.titleDesign of low power lfp amplifier and adaptive neural spike detection circuits
dc.title.alternativeNot available
dc.creator.researcherDwivedi, Shashank
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.noteNot Available
dc.contributor.guideGogoi, Anup Kumar
dc.publisher.placeGuwahati
dc.publisher.universityIndian Institute of Technology Guwahati
dc.publisher.institutionDEPARTMENT OF ELECTRONICS AND ELECTRICAL ENGINEERING
dc.date.registered2010
dc.date.completed2019
dc.date.awarded2019
dc.format.dimensionsNot Available
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:DEPARTMENT OF ELECTRONICS AND ELECTRICAL ENGINEERING

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