Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/408565
Title: Algorithmic Optimization for Binary Decision Diagram Mapped Logic Circuits
Researcher: Siddiqui , Balal
Guide(s): Beg , M. T. and Co-Supervisor: Ahmad, S N
Keywords: Elelectronic and Communication Engineering
Engineering
Engineering and Technology
University: Jamia Milia Islamia University
Completed Date: 2021
Abstract: newline
URI: http://hdl.handle.net/10603/408565
Appears in Departments:Department of Electronics and Communication Engineering

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01_title page.pdfAttached File14.25 kBAdobe PDFView/Open
02_declaration.pdf421.32 kBAdobe PDFView/Open
03_certificate.pdf490.26 kBAdobe PDFView/Open
04_acknowledgments.pdf370.15 kBAdobe PDFView/Open
05_contents.pdf433.52 kBAdobe PDFView/Open
06_list of tables.pdf150.15 kBAdobe PDFView/Open
07_list of figures.pdf544.98 kBAdobe PDFView/Open
08_chapter 1.pdf4.51 MBAdobe PDFView/Open
09_chapter 2.pdf4.48 MBAdobe PDFView/Open
10_chapter 3.pdf6.38 MBAdobe PDFView/Open
11_chapter 4.pdf10.19 MBAdobe PDFView/Open
12_chapter 5.pdf5.54 MBAdobe PDFView/Open
13_chapter 6.pdf465.83 kBAdobe PDFView/Open
14_references.pdf5.71 MBAdobe PDFView/Open
80_recommendation.pdf480.16 kBAdobe PDFView/Open
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