1. Shodhganga@INFLIBNET
  2. National Institute of Technology (NIT) Meghalaya
  3. ELECTRONICS & COMMUNICATION ENGINEERING
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/406428
Title: Methodologies for Optimization of Digital Circuits using Cyclic Combinational Technique and Hybrid CMOS Logic Style
Researcher: Kumar, Vinay
Guide(s): Dandapat, Anup
Keywords: Digital electronics
Digital integrated circuits
Electronics
Engineering
Engineering and Technology
Engineering Electrical and Electronic
Logic circuits
University: National Institute of Technology (NIT) Meghalaya
Completed Date: 2017
Abstract: Available newline
Pagination: xvii, 142p.
URI: http://hdl.handle.net/10603/406428
Appears in Departments:ELECTRONICS & COMMUNICATION ENGINEERING

Files in This Item:
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01_title.pdfAttached File148 kBAdobe PDFView/Open
02_abstract.pdf80.22 kBAdobe PDFView/Open
03_declaration.pdf134.49 kBAdobe PDFView/Open
04_certificate.pdf202.68 kBAdobe PDFView/Open
05_list of publications.pdf197.44 kBAdobe PDFView/Open
06_preface.pdf83.75 kBAdobe PDFView/Open
07_acknowledgements.pdf79.58 kBAdobe PDFView/Open
08_table of contents.pdf163.83 kBAdobe PDFView/Open
09_list of figures.pdf322.79 kBAdobe PDFView/Open
10_lsit of tables.pdf260.35 kBAdobe PDFView/Open
11_symbols & abbreviations.pdf189.28 kBAdobe PDFView/Open
12_chapter 1.pdf693.08 kBAdobe PDFView/Open
13_chapter 2.pdf403.07 kBAdobe PDFView/Open
14_chapter 3.pdf331.8 kBAdobe PDFView/Open
15_chapter 4.pdf631.84 kBAdobe PDFView/Open
16_chapter 5.pdf1.57 MBAdobe PDFView/Open
17_chapter 6.pdf763.07 kBAdobe PDFView/Open
18_chapter 7.pdf702.66 kBAdobe PDFView/Open
19_chapter 8.pdf293.05 kBAdobe PDFView/Open
20_bibliography.pdf80.29 kBAdobe PDFView/Open
21_appendix-1.pdf123.03 kBAdobe PDFView/Open
22_appendix-2.pdf202.89 kBAdobe PDFView/Open
80_recommendation.pdf439.91 kBAdobe PDFView/Open
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