Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/403004
Title: Variation tolerant design of PLL constituents for high speed application
Researcher: Saw, Suraj Kumar
Guide(s): Meher, Preetisudha and Majumder, Alak
Keywords: High Speed Application
Phase Locked Loop
PLL Constituents
Variation Tolerant Design
University: National Institute of Technology Arunachal Pradesh
Completed Date: 2020
Pagination: xvii, 77
URI: http://hdl.handle.net/10603/403004
Appears in Departments:Department of Electronics and Communication Engineering

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01_title.pdfAttached File232.83 kBAdobe PDFView/Open
02_certificate.pdf282.7 kBAdobe PDFView/Open
03_acknowledgement.pdf236.31 kBAdobe PDFView/Open
04_contents.pdf362.34 kBAdobe PDFView/Open
05_list of figures and tables.pdf468.37 kBAdobe PDFView/Open
07_chapter 1.pdf528.94 kBAdobe PDFView/Open
08_chapter 2.pdf1.62 MBAdobe PDFView/Open
09_chapter 3.pdf1.83 MBAdobe PDFView/Open
10_chapter 4.pdf1.05 MBAdobe PDFView/Open
11_chapter 5.pdf985.26 kBAdobe PDFView/Open
12_bibliography.pdf436.15 kBAdobe PDFView/Open
13_list of publications.pdf282.02 kBAdobe PDFView/Open
80_recommendation.pdf351.69 kBAdobe PDFView/Open
abstract.pdf180.61 kBAdobe PDFView/Open
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