Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/400951
Title: Design of compact low noise amplifier using active inductors for narrow band wireless applications
Researcher: Prameela B
Guide(s): Asha Elizabeth Daniel
Keywords: 
Active inductors
Complementary Metal Oxide Semiconductor
Engineering and Technology
Engineering Electrical and Electronic
Low Noise Amplifier
Noise Figure
Transconductance
University: Cochin University of Science and Technology
Completed Date: 2022
Abstract: There is an appreciable development in the Radio Frequency Integrated Circuit (RFIC) newlineresearch as the integration of the transceivers to a single technology provides newlinecost-benefit. One of the focuses of the Radio Frequency (RF) industry and researches newlineis on the narrow-band receiver design because of its application in Industrial, Scientific newlineand Medical (ISM) band and Internet of Things (IoT) solutions. In RF designs, chip newlinearea should be given much importance because reducing the chip area can reduce the newlinefabrication cost. newlineThe first stage of an RF receiver is a Low Noise Amplifier (LNA) which determines newlinethe overall noise of the entire receiver chain. The main challenge in the design of an newlineLNA is the trade-off between Noise Figure (NF), gain, linearity, power consumption, newlineand impedance matching. The area of the LNA is also a concern due to the presence of newlinelarge passive on-chip inductors. The cost of the receiver can be reduced if the chip area newlineof the LNA is reduced. newlineThe thesis proposes a low-cost narrow-band Complementary Metal Oxide newlineSemiconductor (CMOS) LNA design with a competitive Figure of Merit (FOM) in newlineterms of gain, NF, impedance matching, power consumption, and area. Three Active newlineInductor (AI) designs and four AI-based LNA designs were analyzed. The modified newlinecascode topology in the LNA design helped to improve the NF and gain. The passivedrain inductor in the designs was replaced with AI so that the area and hence cost is newlinereduced. The bias voltage of the AI was used to tune the LNA parameters. The newlinepost-layout analysis of the designs were done in Cadence Virtuoso using United newlineMicroelectronics Corporation (UMC) 180nm 1P6M CMOS technology, at a supply newlinevoltage of 1.8 V. Out of the designed LNAs, the resistive feedback AI-based LNA has newlinebetter FOM compared to other state-of-the-art LNAs. The analysis of the proposed newlineLNA shows promising results for 2.4 GHz ISM band wireless applications. newline
Pagination: 250
URI: http://hdl.handle.net/10603/400951
Appears in Departments:School of Engineering

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01_title.pdfAttached File156.45 kBAdobe PDFView/Open
02_declaration.pdf44.42 kBAdobe PDFView/Open
03_certificate.pdf44.64 kBAdobe PDFView/Open
04_acknowledgement.pdf46.5 kBAdobe PDFView/Open
05_content.pdf69.2 kBAdobe PDFView/Open
06_list of graph and table.pdf135.52 kBAdobe PDFView/Open
07_abstract.pdf47.72 kBAdobe PDFView/Open
08_chapter1.pdf323.44 kBAdobe PDFView/Open
09_chapter2.pdf446.07 kBAdobe PDFView/Open
10_chapter3.pdf1.05 MBAdobe PDFView/Open
11_chapter4.pdf1.69 MBAdobe PDFView/Open
12_chapter5.pdf4.4 MBAdobe PDFView/Open
13_chapter6.pdf187.18 kBAdobe PDFView/Open
14_appendix.pdf840.23 kBAdobe PDFView/Open
15_reference.pdf165.92 kBAdobe PDFView/Open
80_recommendation.pdf303.89 kBAdobe PDFView/Open
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