Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/400157
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DC FieldValueLanguage
dc.coverage.spatialPhysics
dc.date.accessioned2022-08-22T07:07:26Z-
dc.date.available2022-08-22T07:07:26Z-
dc.identifier.urihttp://hdl.handle.net/10603/400157-
dc.description.abstractnewline
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleEncoding techniques for achieving reduction of power dissipation and delay by reducing bit transitions and crosstalk on the buses for low power VLSI
dc.title.alternative
dc.creator.researcherShankaranarayana Bhat, M
dc.subject.keywordPhysical Sciences
dc.subject.keywordPhysics
dc.subject.keywordPhysics Nuclear
dc.description.note
dc.contributor.guideBalakrishna, K M
dc.publisher.placeMangalore
dc.publisher.universityMangalore University
dc.publisher.institutionDepartment of Physics
dc.date.registered
dc.date.completed2018
dc.date.awarded
dc.format.dimensions
dc.format.accompanyingmaterialDVD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Physics

Files in This Item:
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01_title page.pdfAttached File11.43 kBAdobe PDFView/Open
02_declaration.pdf153.84 kBAdobe PDFView/Open
03_certificate.pdf98.58 kBAdobe PDFView/Open
04_acknowledgement.pdf145.16 kBAdobe PDFView/Open
05_contents.pdf231.45 kBAdobe PDFView/Open
06_list of table and figures.pdf163.4 kBAdobe PDFView/Open
07_preface.pdf97.7 kBAdobe PDFView/Open
08_chapter 1.pdf251.73 kBAdobe PDFView/Open
09_chapter 2.pdf1.21 MBAdobe PDFView/Open
10_chapter 3.pdf323.03 kBAdobe PDFView/Open
11_chapter 4.pdf523.38 kBAdobe PDFView/Open
12_chapter 5.pdf487.3 kBAdobe PDFView/Open
13_chapter 6.pdf129.4 kBAdobe PDFView/Open
14_publications .pdf170.74 kBAdobe PDFView/Open
15_references.pdf193.05 kBAdobe PDFView/Open
80_recommendation.pdf4.16 MBAdobe PDFView/Open


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