Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/397589
Title: | Design of Hardware implementation for image contrast enhancement using arty seven FPGA |
Researcher: | Madhu Raghaveendra M |
Guide(s): | Lakshmaiah M V |
Keywords: | Physical Sciences Physics Physics Mathematical |
University: | Sri Krishnadevaraya University |
Completed Date: | 2020 |
Abstract: | newlineImplementation for image contrast enhancement |
Pagination: | |
URI: | http://hdl.handle.net/10603/397589 |
Appears in Departments: | Department of Electronics |
Files in This Item:
File | Description | Size | Format | |
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01_title.pdf.pdf | Attached File | 13.27 kB | Adobe PDF | View/Open |
02_declaration.pdf.pdf | 108.71 kB | Adobe PDF | View/Open | |
03_certificate.pdf.pdf | 305.12 kB | Adobe PDF | View/Open | |
04_acknowledgements.pdf.pdf | 117.34 kB | Adobe PDF | View/Open | |
05_contents.pdf.pdf | 41.09 kB | Adobe PDF | View/Open | |
06_list of figures.pdf.pdf | 122.3 kB | Adobe PDF | View/Open | |
07_chapter 1.pdf.pdf | 1.23 MB | Adobe PDF | View/Open | |
08_chapter 2.pdf.pdf | 246.74 kB | Adobe PDF | View/Open | |
09_chapter 3.pdf.pdf | 1.44 MB | Adobe PDF | View/Open | |
10_chapter 4.pdf.pdf | 1.45 MB | Adobe PDF | View/Open | |
11_chapter 5.pdf.pdf | 1.69 MB | Adobe PDF | View/Open | |
12_references.pdf.pdf | 326.23 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 9.04 kB | Adobe PDF | View/Open |
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